1. Field of the Invention
The present invention relates to measuring temperature and, more particularly, to integrated circuit techniques for measuring temperature and adjusting for temperature effects on circuit operation.
2. Background Information
Many chips, such as microprocessor integrated circuit chips, measure the time elapsed based, at least in part, upon an on-chip clock, such as from a crystal. In some situations, it is desirable to have an independent timing reference and, hence, determine whether the on-chip clock frequency, such as for a microprocessor, exceeds a predetermined frequency value.
In one approach to provide an independent timing reference, for example, on-chip analog circuitry may be used to generate a fixed time period based on a current-capacitor charging time. For example, a metal-oxide semiconductor (MOS) transistor may be employed to implement such a current-capacitor, by electrically coupling the drain and source of the MOS transistor to the same voltage. Likewise, a resistor tied to a power supply may charge the capacitor from 0 volts to a reference voltage, for example, and this charging time may be measured. However, since the length of the charging time may vary with temperature, it is desirable to also have a technique to account for the temperature variation during this charging period.
Various approaches to account for the temperature variation have been employed. One approach is to rely primarily on understanding the temperature characteristics of various electronic circuit components on the chip and arrange the analog circuitry such that the temperature characteristics approximately offset or cancel each other. This approach has a number of problems. One problem with this technique is that the temperature profile for each compensating component is different and, therefore, ultimately limits the range over which this compensation approach may be effective, unless complex steps are taken to match the analog temperature characteristics. Another problem with this approach is that it typically results in summing voltages across the compensating components. Unfortunately, this results in undesirably high operating voltage requirements for advanced processes. Finally, the doping densities of the latest processes are such that components with suitable temperature coefficients are not available in standard logic fabrication processes. Thus, additional processing steps would be employed to adjust for this.
Another scheme implemented has been to embed a resistor-capacitor (RC) network with a low temperature coefficient within the package. This scheme, of course, increases packaging complexity and cost, lowers package reliability, and requires a special package design for each device using this scheme. A need, therefore, exists for a technique of providing temperature compensation for a timer circuit that addresses these problems.